Seminar: Takahiro Tsunoda

“Fault Tolerance in Quantum Electrical Circuits”
Monday, March 11 at 1:00pm
MALA 5050
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Abstract

In this seminar, I will present a novel strategy to tackle noise in quantum devices using mid-circuit measurement and fault-tolerant quantum control. Despite the significant computational capabilities of quantum computers, the noise level in state-of-the-art devices necessitates a considerable overhead to build a fully fault-tolerant quantum computer. For the successful scaling of quantum computers and the enlargement of their potential applications, it’s crucial to substantially reduce the error rate at the hardware level.
      
My approach involves a hardware-level error-detection technique using superconducting circuits. Specifically, we encode a logical qubit into a solid-state quantum harmonic oscillator and optimize a quantum control pulse that can detect errors during the gate. This results in a logical gate fidelity of 99.95%, marking a 20-fold improvement after error detection. I will expand this method to create an error-detectable entangling gate and explore future applications of this error-detection gadget within quantum electrical circuits.

Biography

Dr. Takahiro Tsunoda is a postdoctoral associate at Yale University, specializing in superconducting circuits and bosonic quantum error correction. He earned his doctorate in physics from the University of Oxford, where he focused on engineering extensible superconducting circuit architecture and the application of nuclear magnetic resonance techniques to superconducting qubit control.